Recently the two research areas of parallelizing compilation and regular array design have found common ground when, with the help of researchers in both areas, the parallelization of nested loops could be put on a theoretical basis in linear programming, linear algebra, convex polyhedra and formal semantics. At the same time, the relevance of loop parallelization has increased due to advances in parallel (particularly massively parallel) processor technology.

This workshop aimed to bring the two research communities even closer together and provide a forum for the discussion of questions like:

• Combine research areas of parallelizing compilation and regular array design. In particular, mathematical models and methods have been compared, i.e. linear (integer) programming, linear (integer) algebra, convex polyhedra, formal semantic and automated proving for construction and verification of parallelizing program transformations.
• What techniques in either area are relevant for loop parallelization? Constraints implied by different target architectures have been taken into account.
• What is the impact of recent developments in parallel hardware on loop parallelization (and vice versa)?
• What degree of automation can be expected in loop parallelization and what shape do (should) loop parallelization tools take?

Some of the presentations will be published within a special issue of "Parallel Processing Letters" in Spring 1994.

The 40 participants of this workshop came from 8 countries, i.e. l1 from Germany, 17 from other European countries, 1 from Canada and 11 from US. The organizers would like to thank everyone who has helped to make the seminar a great success.

Creative Commons BY 3.0 DE