Software verification and synthesis are founded on similar principles, yet verification has become industrial reality while successes of synthesis remain confined to a handful of domains. Still, recent years witnessed increased interest in software synthesis---a trend spurred by growing software complexity and simultaneously enabled by advances in verification, decision procedures, and machine learning. The goal of the seminar is to help the revival of software synthesis through intellectual exchange among experts in deductive synthesis, controller synthesis and the diverse spectrum of new synthesis efforts in inductive synthesis, auto-tuning, programming by demonstration and partial programming. This is an opportune moment for software synthesis. First, multi-core processors are likely to make software development harder, motivating automatic construction of synchronization and communication code. Second, software verification and checking reached industrial maturity through judicious use of linguistic support, decision procedures, and dynamic analyses, inspiring solutions to open synthesis problems. Third, by incorporating verification into synthesis, we may be able to synthesize programs that are easier to verify than handwritten programs. Fourth, parallel computers enable search powerful enough for synthesis of well-tuned programs, as demonstrated by auto-tuners and super-optimizers. Finally, recent systems built on programming by demonstration make us hope that specification will be easier to write.

The seminar organizers hope to achieve the following goals:

• Offer brief tutorials on techniques developed by communities participating in the seminar.
• Develop a set of challenge problems for practical synthesis, a collection of practical problems solvable by (semi-)automatic synthesis in five years.
• Deepen the understanding of the relationships between the various approaches to synthesis. In particular, to what extent are the techniques developed by the respective communities independent from their driving applications? Understand strengths of the alternative approaches.
• Understand relationships and applicability of verification technology to software synthesis.
• Outline a syllabus for a graduate course in software synthesis.