Dagstuhl-Seminar 13052
Multicore Enablement for Embedded and Cyber Physical Systems
( 27. Jan – 01. Feb, 2013 )
(zum Vergrößern in der Bildmitte klicken)
Permalink
Bitte benutzen Sie folgende Kurz-Url zum Verlinken dieser Seite:
https://www.dagstuhl.de/13052
Organisatoren
- Andreas Herkersdorf (TU München, DE)
- Michael G. Hinchey (University of Limerick, IE)
- Michael Paulitsch (EADS Deutschland - München, DE)
Kontakt
- Susanne Bach-Bernhard (für administrative Fragen)
Programm
Multicore processors are a key enabling technology for solving grand societal challenges of the coming decades. Secure and ecological mobility, geographic coverage of high-tech healthcare, sustainable energy generation, distribution and management, and in general the development of our digitized society impose compute performance requirements on distributed embedded and cyber physical IT equipment which makes multicore technology indispensible.
Embedded and Cyber Physical Systems exhibit demands for “non-functional requirements”, such as low(est) power and energy dissipation, reliability and security, real-time and cost constraints, which are typically not found to the same extent in general purpose computing applications. The enablement of multicore technology for embedded and cyber physical markets imposes serious challenges to industry and academia which can easily overwhelm the capabilities and capacities of individual corporations or even consortia. An interdisciplinary industry-academia partnership is necessary to establish an ecosystem around multicore technologies that can be exploited within multiple application domains and by different industry and university players.
The seminar will bring together leading industry and university research groups from different fields of embedded system design and application development, multicore architecture and hardware/software design methodology & tools. The call and main objective of the seminar is on contributions that are reusable and transferable among market segments, vendors and research institutions in the context of a technology ecosystem. Thereby, the technical focus of the agenda will be on:
- Generic hardware/software building blocks for real-time performance, dependability, functional safety and security for embedded systems built around enhanced standard multicore solutions.
- System modeling, design and validation methods and tools for such platforms.
We envision that an advanced multicore ecosystem evolves through close collaborations between industry and academia. In order to foster and investigate efficient ways for technology transfer and early industry adoption of prototypes and results, a strong industry participation in the seminar is encouraged. The seminar will establish new and strengthen existing ties between networks in the area of multicore and embedded technologies, with non-functional requirements representing the common denominator of economical and scientific interest.
Multicore processors are a key enabling technology for solving grand societal challenges of the coming decades. Secure and ecological mobility, geographic coverage of high-tech healthcare, sustainable energy generation, distribution and management, and in general the development of our digitized society impose compute performance requirements on distributed embedded and cyber physical IT equipment which makes multicore technology indispensable. All leading processor vendors -- ARM, Freescale, IBM, Infineon, Intel, MIPS, Nvidia -- follow a strictly multicore-oriented strategy. Due to the paradigm shift from exploiting instruction level to process level parallelism, multicore processors are superior over single-core representatives with respect to computing performance and energy efficiency. Prerequisite is, processes can be balanced among parallel cores such that the nominally available computing performance can be utilized effectively, and cores can be set into sleep mode or power gated when not busy. As of today, the ability to efficient utilize the available resources depends to a large extent on the aptitude of experienced programmers and the inherent ability of being able to parallize the computing problem.
Embedded and Cyber Physical Systems exhibit demands for "non-functional requirements", such as low(est) power and energy dissipation, reliability, availability and security, real-time and cost constraints, which are typically not found to the same extent in general purpose computing applications. The enablement of multicore technology for embedded and cyber-physical markets imposes serious challenges to industry and academia which can easily overwhelm the capabilities and capacities of individual corporations or even consortia. Industry and university research in Europe recognized early and invested significantly into the establishment of multicore know-how and competences. Examples of related projects at EU level and in Germany are: RECOMP - Reduced Certification Costs Using Trusted Multicore Platforms, ACROSS - ARTEMIS CROSS-Domain Architecture, SPES 2020 - Software Plattform Embedded Systems 2020, Cesar - Cost-efficient methods and processes for safety relevant embedded systems, MERASA - Multicore Execution of Hard Real-Time Applications Supporting Analysability (see Relationship to other seminars and projects for a more complete listing), and ARAMiS - Automotive, Railway and Avionics Multicore Systems.
The seminar brought together leading industry and university research groups from different fields of embedded system design and application development, multicore architecture and hardware/software design methodology & tools. The main objective of the seminar was on reporting experiences and discussing challenges of reusable and transferable multicore technologies among participants representing different application markets and scientific backgrounds. The technical focus of the agenda was on:
- Generic hardware/software building blocks for real-time performance, dependability, functional safety and security for embedded systems built around enhanced standard multicore solutions.
- System modeling, design and validation methods and tools for such platforms.
The seminar established new and strengthened existing ties between players and networks in the area of multicore and embedded technologies. Topical working groups were formed on the following topics:
- Specification & Interference
- Industrial Perspective on MultiCore Motivations and Challenges
- Certification of Safety-Critical Multicore Systems: Challenges and Solutions
- Network-on-Chip -- Dependability and Security Aspects
- Multicore Ecosystem
- Secure Elements in future embedded multicore systems
The working groups compiled summaries reflecting the status and outlook on the respective topic. These summaries can be found in the sequel of this report.
Creative Commons BY 3.0 Unported license
Andreas Herkersdorf and Michael Paulitsch
- Michael Deubzer (Timing Architects Embedded Systems GmbH, DE) [dblp]
- Christian El Salloum (TU Wien, AT) [dblp]
- Rolf Ernst (TU Braunschweig, DE) [dblp]
- Glenn Farrall (Infineon - Bristol, GB) [dblp]
- Christian Ferdinand (AbsInt - Saarbrücken, DE) [dblp]
- Massimo Ferraguto (Space Syst. Finland Ltd - Espoo, FI) [dblp]
- Steffen Görzig (Daimler AG - Böblingen, DE) [dblp]
- René Graf (Siemens AG - Nürnberg, DE) [dblp]
- David Gregg (Trinity College Dublin, IE) [dblp]
- Geoff Hamilton (Dublin City University, IE)
- Andreas Herkersdorf (TU München, DE) [dblp]
- Johan Lilius (Abo Akademi University, FI) [dblp]
- Enno Lübbers (Intel GmbH - Feldkirchen, DE) [dblp]
- Roman Obermaisser (Universität Siegen, DE) [dblp]
- Sri Parameswaran (UNSW - Sydney, AU) [dblp]
- Michael Paulitsch (EADS Deutschland - München, DE) [dblp]
- Stefan M. Petters (The Polytechnic Institute of Porto, PT) [dblp]
- Matthias Pruksch (sepp.med - Röttenbach, DE)
- Georg Sigl (TU München, DE) [dblp]
- Claus Stellwag (Elektrobit Automotive - Erlangen, DE) [dblp]
- Jürgen Teich (Universität Erlangen-Nürnberg, DE) [dblp]
- Christian Thiel (BICCnet - TU München, DE) [dblp]
- Lothar Thiele (ETH Zürich, CH) [dblp]
- Sergey Tverdyshev (Sysgo AG, DE) [dblp]
- Theo Ungerer (Universität Augsburg, DE) [dblp]
- Stefan Wallentowitz (TU München, DE) [dblp]
- Alexander Weiss (Accemic GmbH & Co. KG - Kiefersfelden, DE) [dblp]
- Thomas Wild (TU München, DE) [dblp]
- Reinhard Wilhelm (Universität des Saarlandes, DE) [dblp]
Klassifikation
- hardware
- modelling / simulation
- security / cryptology
Schlagworte
- multicore hardware software platforms embedded systems security real-time safety cyber physical systems
